1. Field of the Invention
The present invention relates generally to chemical mechanical planarization (CMP) methods and systems, and more particularly, to a method for pulsing or oscillating a polishing head to reduce or prevent de-lamination of a semiconductor wafer film layers during a CMP process.
2. Description of the Related Art
In the fabrication of semiconductor devices, planarization operations of silicon wafers, which can include polishing, buffing, and cleaning, are often performed. Typically, integrated circuit devices are in the form of multi-level structures on silicon substrate wafers. At the substrate level, transistor devices with diffusion regions are formed. In subsequent levels, interconnect metallization lines are patterned and electrically connected to the transistor devices to define the desired functional device. Patterned conductive layers are insulated from other conductive layers by dielectric materials. As more metallization levels and associated dielectric layers are formed, the need to planarize the dielectric material increases. Without planarization, fabrication of additional metallization layers becomes substantially more difficult due to the higher variations in the surface topography. In other applications, metallization line patterns are formed into the dielectric material, and then metal planarization operations are performed to remove excess metallization.
Planarizing metallization layers, specifically copper metallization layers is becoming more important as copper has begun to replace aluminum as the metal of choice for metallization processes. One method for achieving semiconductor wafer planarization is the Chemical Mechanical Planarization (CMP) technique. Further applications include planarization of dielectric films deposited prior to the metallization process, such as dielectrics used for shallow trench isolation or for poly-metal insulation. In general, the CMP process involves holding and rubbing a typically rotating wafer against a moving polishing pad under a controlled pressure and relative speed. CMP systems typically implement an orbital table or a linear belt in which a preparation surface of a polishing pad is used to polish one side of a wafer. Slurry is used to facilitate and enhance the CMP process. Slurry is most usually introduced onto a moving preparation surface and distributed over the preparation surface as well as the surface of the semiconductor wafer being buffed, polished, or otherwise prepared by the CMP process. The distribution of the slurry is generally accomplished by a combination of the movement of the preparation surface, the movement of the semiconductor wafer and the friction created between the semiconductor wafer and the preparation surface.
FIG. 1 shows a linear belt-type CMP system 100 in accordance with the prior art. The linear belt-type CMP system 100 includes a polishing head 108, which secures and holds a wafer 104 in place during CMP processing. A polishing belt and pad combination (“belt pad”) 102 forms a loop around rotating drums 112, and moves in a direction 106 at a speed of up to approximately 600 feet per minute, however this speed may vary depending upon the specific CMP process. As the belt pad 102 moves, the polishing head 108 rotates in a direction 110 and lowers the wafer 104 onto the top surface (i.e., the preparation surface) of the belt pad 102. The wafer 104 is applied to the belt pad 102 with a force 118 sufficient to facilitate the CMP process. A platen 124 supports the belt pad 102 to provide a resistance to the force 118.
A nozzle 120 having a number of discrete dispense points dispenses a slurry 122 onto the top surface of the belt pad 102. Movement of the belt pad 102 in the direction 106 transports slurry 122 underneath the wafer 104. The belt pad 102 is typically configured with longitudinal grooves 103, to enhance the spread of slurry 122. The position of the nozzle 120 can be adjusted across the width of the top surface of the belt pad 102. The nozzle 120 is typically aligned in a position relative to the wafer 104 such as center on the wafer 104. However, the position of the nozzle 120 can be adjusted to somewhat optimize the uniformity of the removal of material from the surface of the wafer 104.
FIG. 2 shows a top view of the linear belt-type CMP system 100 in accordance with the prior art. The nozzle 120 dispenses the slurry 122 onto the belt pad 102 as the belt pad 102 moves in the direction 106. The slurry 122 travels underneath the polishing head 108 between the wafer 104 and belt pad 102. The force 118 transferred through the wafer 104 to the belt pad 102 causes slurry 122 to be squeezed out from under the wafer 104. As slurry 122 is squeezed from under the wafer 104, a slurry buildup 126 occurs around the periphery of the polishing head 108. Typically, not all of the slurry 122 dispensed from the nozzle 120 onto the belt pad 102 is able to pass underneath the polishing head 108. Thus, the slurry buildup 126 tends to be greater at locations where the slurry 122 is incident upon the polishing head 108. As the polishing head 108 rotates in the direction 110, adhesion forces between the slurry 122 and polishing head 108 tend to partially wrap the slurry buildup 126 around the polishing head 108. Since the slurry buildup 126 is not completely wrapped around the polishing head 108, a dry wake region 128 exists behind the polishing head 108. The dry wake region 128 characteristics are dependent on the CMP process parameters.
The slurry 122 is a fluid medium that transports reactants to the wafer 104 surface and carries reactions products away from the wafer 104 surface. The slurry 122 also plays an important role in lubricating the interface between the belt pad 102 and wafer 104 surface, ensuring an equal distribution of hydrodynamic pressure across the wafer 104 surface. Heat generated during the CMP process through friction and chemical reaction is also removed by the slurry 122 flow, helping to keep the wafer 104 temperature stable and uniform. The stability and uniformity of CMP process results across the wafer 104 surface are dependent on the slurry 122 distribution characteristics across the wafer 104 surface. The slurry 122 present in the dry wake region 128 differs from the slurry 122 that wraps around the polishing head 108 in many respects such as volume, chemistry, composition, and thermal load. As the belt pad 102 rotates around the drums 112 a fresh amount of slurry 122 from the nozzle 120 will be deposited across the belt pad 102. However, a combination of dry wake region 128 slurry 122 with fresh slurry 122 will continue to differentiate the dry wake region 128 from the remainder of the belt pad 102. As the CMP process continues, the characteristics differentiating the dry wake region 128 from the remainder of the belt pad 102 will become more pronounced.
Semiconductor technology is currently implementing the dual advances of using copper for metal-interconnects and “low-K” materials for the insulation between adjacent metal-interconnects and layers in a semiconductor wafer. FIG. 3 shows an exemplary wafer 104 film stack cross-section in accordance with the prior art. A substrate material 136 (e.g., silicon) defines a first layer of the wafer 104. The substrate material 136 is covered by a TEOS film 134. The TEOS film is covered by a low-K material film 132 wherein the low-K material has a dielectric constant less than a common insulator such as silicon dioxide. The low-K material film 132 is covered by a metallization layer 130. An interconnect 140 extending from the metallization layer 130 is also shown. In some cases, an insulating protective layer of oxide or nitride may also be present between the low-K material film 132 and the metallization layer 130. By using copper and low-K materials, the number of layers and the distance between metal-interconnects can be reduced while improving device speed and yield. However, low-K materials are typically experimental materials that may not adhere well to their underlying layer in the wafer 104. Due to this adhesion challenge between the low-K material film and its underlying layer, the CMP process should be performed in a manner that does not cause the low-K material film 132 to peel or de-laminate. Additionally, when there is a copper metallization layer on top of a low-K material film 132, the copper metallization layer may de-laminate along with the low-K material film 132. A film interface 138 in FIG. 3 shows a location where the low-K material film 132 would likely de-laminate from its underlying layer. The de-lamination of the low-K material film 132 is initiated primarily by increased stress that develops in localized areas of the wafer. The development of increased stress in localized areas of the wafer is often due to lack of uniform slurry 122 conditions across the wafer 104 surface. Lack of uniform slurry 122 volume and chemistry will serve to maximize the mechanical (i.e., abrasive) stresses in the affected areas of the wafer 104 surface. Therefore, as the slurry 122 characteristics in the dry wake region 128 become more differentiated and pronounced relative to the remainder of the belt pad 102, the probability of low-K material film 132 de-lamination increases. Once initiated, the de-lamination of the low-K material film 132 will rapidly spread across the wafer 104.
In view of the foregoing, there is a need for an apparatus and method that can be implemented in a CMP process to prevent de-lamination of wafer 104 film layers having weak adhesion characteristics.